IEEE

Implementation of 128-bit Radix-4 Booth Multiplier

Abstract: A description of the multiplication of two binary numbers of size 128-bits each using Radix-4 Booth's Algorithm is presented in this paper. Booth Encoder circuit, Partial Product Generator ...
IEEE

Implementation of radix 4 booth multiplier using MGDI technique

Abstract: Here we presents Modified Gate Diffusion Input technique used to implement radix 4 Booth Multiplier. Use of Booth algorithm as compare to other multiplication algorithms in multiplication ...
Scientific Research Publishing

Multiplier Design Utilizing Tri Valued Logic for RLNS Based DSP Applications ()

Residue Number System (RNS) has proved shaping the Digital Signal Processing (DSP) units into highly parallel, faster and secured entities. The computational complexity of the multiplication process ...